Embedded System Terminology - I
| I/O - The interface between a processor and the world around it. |
| I/O Device - A piece of hardware that interfaces between the processor and the outside world. |
| I/O Map - A table or diagram containing the name and address range of each I/O device addressable by the processor within the I/O space |
| I/O Space - A special memory region provided by some processors and generally reserved for the attachment of I/O devices |
| I2C - Inter-Integrated Circuit bus |
| In-circuit Emulator (ICE) - A device used in the development and debugging of an embedded system which emulates the master processor on an embedded board. |
| Inductance - The storage of electrical energy within a magnetic field. |
| Inductor - An electrical component made up of coiled wire surrounding some type of core (air, iron, etc.). When a current is applied to a conductor, energy is stored in the magnetic field surrounding the coil allowing for a energy storing and filtering effect. |
| Infrared (IR) - Light in the THz (1,000 GHz , 2 x 1011 Hz—2 x 1014 Hz) range of frequencies. |
| Instruction Pointer - A register in a processor that contains the address of the next instruction to be executed. |
| Instruction Set Architecture (ISA) - The features that are built into an architecture’s instruction set, including the types of operations, types of operands, and addressing modes, to name a few. |
| Insulator - A type of component or material which impedes the movement of an electric current. |
| Integrated Circuit (IC) - An electrical device made up of several other discrete electrical active elements, passive elements, and devices (transistors, resistors, etc.)—all fabricated and interconnected on a continuous substrate (chip). |
| Interpreter - A mechanism that translates higher-level source code into machine code, one line or one byte code at a time. |
| Interrupt - An asynchronous electrical signal. |
| Interrupt Handler - The software that handles (processes) the interrupt, and is executed after the context switch from the main instruction stream as a response to the interrupt. |
| Interrupt Latency - The amount of time between the assertion of an interrupt signal and the start of the associated ISR |
| Interrupt Service Routine (ISR) - See Interrupt Handler. |
| Interrupt Type - A unique number associated with each interrupt. The interrupt type is typically the processor's index into the IVR |
| Interrupt Vector - An address of an interrupt handler. |
| Interrupt Vector Table - A table containing interrupt vectors, indexed by interrupt type, that maps interrupt and ISR. The interrupt vector table must be initialized before interrupts are enabled. |
| Intertask Communication - The passing of data between tasks in a multitasking system with extensive RTOS resources like mailbox, queue, etc to safely transfer data without risk of race conditions. |
| Intertask synchronization - The coordination of timing and ordering between tasks in a multitasking environment with extensive RTOS resources like semaphore, monitors, etc to safely synchronise without risk of race conditions. |
| Inverter - A NOT gate that inverts a logical level input, such as from HIGH to a LOW or vice-versa. |
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Related topics:
Embedded System Architecture | Embedded Hardware Architecture | Embedded Software Architecture | Embedded Software Definition | Embedded System Acronyms | Embedded System Symbols
List of topics: Embedded System
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