8051 Subtraction of Unsigned Numbers

Subtract with borrow – SUBB A,src-byte

SUBB subtracts the indicated variable and the carry flag together from the Accumulator, leaving the result in the Accumulator. SUBB sets the carry (borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was set before executing a SUBB instruction, this indicates that a borrow was needed for the previous step in a multiple-precision subtraction, so the carry is subtracted from the Accumulator along with the source operand.)

AC is set if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.

When subtracting signed integers, OV indicates a negative number produced when a negative value is subtracted from a positive value, or a positive result when a positive number is subtracted from a negative number.

The source operand allows four addressing modes: register, direct, register-indirect, or immediate.

SUBB A,Rn
Encoding:10011nnn

SUBB A,direct address
Encoding:10010101 direct address

SUBB A,@Ri
Encoding:1001011i

SUBB A,#immediate data
Encoding:10010100 immediate data

The Accumulator holds 0C9H (11001001B), register 2 holds 54H (01010100B), and the carry flag is set. The instruction,

SUBB A,R2

will leave the value 74H (01110100B) in the accumulator, with the carry flag and AC cleared but OV set.

Notice that 0C9H minus 54H is 75H. The difference between this and the above result is due to the carry (borrow) flag being set before the operation. If the state of the carry is not known before starting a single or multiple-precision subtraction, it should be explicitly cleared by CLR C instruction

The SUBB instruction,

SUBB A, operand ; A = A – operand – Carry flag

8051 use 2’s complement method for subtraction. The steps of the hardware of the CPU in executing the SUBB instruction for unsigned numbers, as follows.

Take the 2’s complement 1. of the subtrahend (source operand).
Add it to the minuend (A).
Invert the carry.
After these three steps the result is obtained and the flags are set.

ORG 0H
CLR C
CLR A
MOV A, #3FH
MOV R3, #23H
SUBB A, R3
END


A = 3F 0011 1111
R3 = 23 0010 0011

Step 1: 1’s complement of 23 is 1101 1100. Adding 1 to it will give us the 2’s complement of 23: 1101 1101.
Step 2: Add it to 2F. 0011 1111 + 1101 1101 = 1 0001 1100. C = 1
Step 3: Invert the carry. C = 0.

If the C Y = 0 after the execution of SUBB, the result is positive; if C Y = 1, the result is negative and the destination has the 2,s complement of the result. Normally, the result is left in 2’s complement, but the CPL (complement) and INC instructions can be used to change it. The CPL instruction performs the 1’s complement of the operand; then the operand is incremented (INC) to get the 2’s complement.

	ORG 0H
MAIN :
	CLR A
	CLR C
	MOV A, #4CH
	SUBB A, #6EH
	JNC NEXT	; if C = 0, jump to save the result
	CPL A	; if C = 1, take 1’s complement
	INC A	; increment to get 2’s complement
NEXT :	MOV R1, A	; save the result
	END	; end of asm source file

---

<< Previous :: Up :: Next >>

---

Related topics:
8051 Addition of Unsigned Numbers   |   8051 Addition of 16-bit Numbers   |   8051 Subtraction of 16-bit Numbers   |   8051 Multiplication Unsigned 8-bit   |   8051 Division Unsigned 8-bit   |   8051 SUBB Instruction

---

List of topics: 8051

---