Short Jump
Instruction | SJMP relative address |
---|---|
Function | Short Jump |
Bytes | 2 |
Cycles | 2 |
Encoding | 1 0 0 0 0 0 0 0 A7...A0 |
Operation | PC = PC + 2 PC = PC + offset |
Description | Program control branches unconditionally to the address indicated. The branch destination is computed by adding the signed displacement in the second instruction byte to the PC, after incrementing the PC twice. Therefore, the range of destinations allowed is from 128 bytes preceding this instruction 127 bytes following it. |
Flags Affected | C AC F0 RS1 RS0 OV P |
Example | The label RELADR is assigned to an instruction at program memory location 0123H. The following instruction, SJMP RELADR assembles into location 0100H. After the instruction is executed, the PC contains the value 0123H. Note: Under the above conditions the instruction following SJMP is at 102H. Therefore, the displacement byte of the instruction is the relative offset (0123H-0102H) = 21H. Put another way, an SJMP with a displacement of 0FEH is a one-instruction infinite loop. |
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold |
Related topics:
8051 Program Branching Instructions | 8051 ACALL Instruction | 8051 LCALL Instruction | 8051 RET Instruction | 8051 RETI Instruction | 8051 JMP Instruction | 8051 AJMP Instruction | 8051 LJMP Instruction | 8051 JZ Instruction | 8051 JNZ Instruction | 8051 CJNE Instruction | 8051 DJNZ Instruction | 8051 NOP Instruction
List of topics: 8051
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