Long Jump
| Instruction | LJMP addr16 |
|---|---|
| Function | Long Jump |
| Bytes | 3 |
| Cycles | 2 |
| Encoding | 0 0 0 0 0 0 1 0 A15...A8 A7...A0 |
| Operation | PC = addr16 |
| Description | LJMP causes an unconditional branch to the indicated address, by loading the high-order and low-order bytes of the PC (respectively) with the second and third instruction bytes. The destination may therefore be anywhere in the full 64K program memory address space. No flags are affected. |
| Flags Affected | C AC F0 RS1 RS0 OV P |
| Example | The label JMPADR is assigned to the instruction at program memory location 1234H. The instruction, LJMP JMPADR at location 0123H will load the program counter with 1234H. |
| Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold | |
Related topics:
8051 Program Branching Instructions | 8051 ACALL Instruction | 8051 LCALL Instruction | 8051 RET Instruction | 8051 RETI Instruction | 8051 JMP Instruction | 8051 AJMP Instruction | 8051 SJMP Instruction | 8051 JZ Instruction | 8051 JNZ Instruction | 8051 CJNE Instruction | 8051 DJNZ Instruction | 8051 NOP Instruction
List of topics: 8051
No comments:
Post a Comment