Logical Operations
- A, Acc: Accumulator
- B: B special function register
- C: Carry flag in PSW
- Rn: Register R7-R0 of the currently selected Register Bank.
- dir: 8-bit internal data location’s address. This could be an Internal Data RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)]. Direct Addressing Mode.
- @Ri : 8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0. Indirect Addressing Mode.
- #data: 8-bit constant included in instruction. Immediate Addressing Mode.
- #data 16: 16-bit constant included in instruction. Immediate Addressing Mode.
- addr 16: 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K byte Program Memory address space. Long Addressing Mode.
- addr 11: 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following instruction. Absolute Addressing Mode.
- rel: Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Relative Addressing Mode.
- bit: Direct Addressed bit in Internal Data RAM or Special Function Register 1B: 1 byte
2B: 2 byte
3B: 3 byte
1C: 1 cycle
2C: 2 cycles
4C: 4 cycles
P: oscillator Period
| Mnemonic | Description | |
|---|---|---|
| ANL | A,Rn | AND Register to Accumulator [1B,1C,12P] |
| ANL | A,direct | AND direct byte to Accumulator [2B,1C,12P] |
| ANL | A,@Ri | AND indirect RAM to Accumulator [1B,1C,12P] |
| ANL | A,#data | AND immediate data to Accumulator [2B,1C,12P] |
| ANL | direct,A | AND Accumulator to direct byte [2B,1C,12P] |
| ANL | direct,#data | AND immediate data to direct byte [3B,2C,24P] |
| ORL | A,Rn | OR Register to Accumulator [1B,1C,12P] |
| ORL | A,direct | OR direct byte to Accumulator [2B,1C,12P] |
| ORL | A,@Ri | OR indirect RAM to Accumulator [1B,1C,12P] |
| ORL | A,#data | OR immediate data to Accumulator [2B,1C,12P] |
| ORL | direct,A | OR Accumulator to direct byte [2B,1C,12P] |
| ORL | direct,#data | OR immediate data to direct byte [3B,2C,24P] |
| XRL | A,Rn | Exclusive-OR Register to Accumulator [1B,1C,12P] |
| XRL | A,direct | Exclusive-OR direct byte to Accumulator [2B,1C,12P] |
| XRL | A,@Ri | Exclusive-OR indirect RAM to Accumulator [1B,1C,12P] |
| XRL | A,#data | Exclusive-OR immediate data to Accumulator [2B,1C,12P] |
| XRL | direct,A | Exclusive-OR Accumulator to direct byte [2B,1C,12P] |
| XRL | direct,#data | Exclusive-OR immediate data to direct byte [3B,2C,24P] |
| CLR | A | Clear Accumulator [1B,1C,12P] |
| CPL | A | Complement Accumulator [1B,1C,12P] |
| RL | A | Rotate Accumulator Left [1B,1C,12P] |
| RLC | A | Rotate Accumulator Left through the Carry [1B,1C,12P] |
| RR | A | Rotate Accumulator Right [1B,1C,12P] |
| RRC | A | Rotate Accumulator Right through the Carry [1B,1C,12P] |
| SWAP | A | Swap nibbles within the Accumulator [1B,1C,12P] |
Boolean operations
ANL Logical AND
ORL Logical OR
CPL Complement (logical NOT)
XRL Logical XOR (exclusive OR)
ANL A, #55h ; AND each bit in A with corresponding bit in number 55h, leaving the result in A.
ANL 42h, R4 ; AND each bit in RAM location 42h with corresponding bit in R4, leaving the result in RAM location 42h.
ORL A,@R1 ; OR each bit in A with corresponding bit in the number whose address is contained in R1 leaving the result in A.
XRL R4, 80h ; XOR each bit in R4 with corresponding bit in RAM location 80h (port 0), leaving result in A.
CPL R0 ; Complement each bit in R0
Rotate
The ability to rotate the A register (accumulator) data is useful to allow examination of individual bits. The options for such rotation are as follows:
RL A ; Rotate A one bit to the left. Bit 7 rotates to the bit 0 position
RLC A ; The Carry flag is used as a ninth bit in the rotation loop
RR A ; Rotates A to the right (clockwise)
RRC A ; Rotates to the right and includes the carry bit as the 9th bit.
Swap
The Swap instruction swaps the accumulator’s high order nibble with the low-order nibble using the instruction.
SWAP A
Related topics:
8051 Instruction Set Overview | 8051 Instruction Cycle | 8051 Machine Cycle | 8051 Instruction Set Summary | 8051 Arithmetic Operation Instructions | 8051 Data Transfer Instructions | 8051 Boolean Variable Manipulation Instructions | 8051 Program Branching Instructions | 8051 Instruction Opcode | 8051 Instructions that Affect Flag Settings | 8051 Instructions and Examples
List of topics: 8051
No comments:
Post a Comment