8051 Instruction Set Summary

Summary of 8051 Instruction Set

• A, Acc: Accumulator
• B: B special function register
• C: Carry flag in PSW
• Rn: Register R7-R0 of the currently selected Register Bank.
• dir: 8-bit internal data location’s address. This could be an Internal Data RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)]. Direct Addressing Mode.
• @Ri : 8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0. Indirect Addressing Mode.
• #data: 8-bit constant included in instruction. Immediate Addressing Mode.
• #data 16: 16-bit constant included in instruction. Immediate Addressing Mode.
• addr 16: 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K byte Program Memory address space. Long Addressing Mode.
• addr 11: 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following instruction. Absolute Addressing Mode.
• rel: Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Relative Addressing Mode.
• bit: Direct Addressed bit in Internal Data RAM or Special Function Register
1B: 1 byte
2B: 2 byte
3B: 3 byte
1C: 1 cycle
2C: 2 cycles
4C: 4 cycles
P: oscillator period

Opcode	Instruction
00h	NOP [1B, 1C]
01h	AJMP code addr (addr11) [2B, 2C]
02h	LJMP code addr (addr16) [3B, 2C]
03h	RR A [1B, 1C]
04h	INC A [1B, 1C]
05h	INC data addr (direct) [2B, 1C]
06h	INC @R0 [1B, 1C]
07h	INC @R1 [1B, 1C]
08h	INC R0 [1B, 1C]
09h	INC R1 [1B, 1C]
0Ah	INC R2 [1B, 1C]
0Bh	INC R3 [1B, 1C]
0Ch	INC R4 [1B, 1C]
0Dh	INC R5 [1B, 1C]
0Eh	INC R6 [1B, 1C]
0Fh	INC R7 [1B, 1C]
10h	JBC bit addr, code addr (rel) [3B, 2C]
11h	ACALL code addr (addr11) [2B, 2C]
12h	LCALL code addr (addr16) [3B, 2C]
13h	RRC A [1B, 1C]
14h	DEC A [1B, 1C]
15h	DEC data addr (direct) [2B, 1C]
16h	DEC @R0 [1B, 1C]
17h	DEC @R1 [1B, 1C]
18h	DEC R0 [1B, 1C]
19h	DEC R1 [1B, 1C]
1Ah	DEC R2 [1B, 1C]
1Bh	DEC R3 [1B, 1C]
1Ch	DEC R4 [1B, 1C]
1Dh	DEC R5 [1B, 1C]
1Eh	DEC R6 [1B, 1C]
1Fh	DEC R7 [1B, 1C]
20h	JB bit addr,code addr (rel) [3B, 2C]
21h	AJMP code addr (addr11) [2B, 2C]
22h	RET [1B, 2C]
23h	RL A [1B, 1C]
24h	ADD A, #data (immediate) [2B, 1C]
25h	ADD A,data addr (direct) [2B, 1C]
26h	ADD A,@R0 [1B, 1C]
27h	ADD A,@R1 [1B, 1C]
28h	ADD A,R0 [1B, 1C]
29h	ADD A,R1 [1B, 1C]
2Ah	ADD A,R2 [1B, 1C]
2Bh	ADD A,R3 [1B, 1C]
2Ch	ADD A,R4 [1B, 1C]
2Dh	ADD A,R5 [1B, 1C]
2Eh	ADD A,R6 [1B, 1C]
2Fh	ADD A,R7 [1B, 1C]
30h	JNB bit addr,code addr (rel) [3B, 2C]
31h	ACALL code addr (addr11) [2B, 2C]
32h	RETI [1B, 1C]
33h	RLC A [1B, 1C]
34h	ADDC A, #data (immediate) [2B, 1C]
35h	ADDC A,data addr (direct) [2B, 1C]
36h	ADDC A,@R0 [1B, 1C]
37h	ADDC A,@R1 [1B, 1C]
38h	ADDC A,R0 [1B, 1C]
39h	ADDC A,R1 [1B, 1C]
3Ah	ADDC A,R2 [1B, 1C]
3Bh	ADDC A,R3 [1B, 1C]
3Ch	ADDC A,R4 [1B, 1C]
3Dh	ADDC A,R5 [1B, 1C]
3Eh	ADDC A,R6 [1B, 1C]
3Fh	ADDC A,R7 [1B, 1C]
40h	JC code addr (rel) [2B, 2C]
41h	AJMP code addr (addr11) [2B, 2C]
42h	ORL data addr (direct),A [2B, 1C]
43h	ORL data addr (direct),#data (immediate) [3B, 2C]
44h	ORL A, #data (immediate) [2B, 1C]
45h	ORL A,data addr (direct) [2B, 1C]
46h	ORL A,@R0 [1B, 1C]
47h	ORL A,@R1 [1B, 1C]
48h	ORL A,R0 [1B, 1C]
49h	ORL A,R1 [1B, 1C]
4Ah	ORL A,R2 [1B, 1C]
4Bh	ORL A,R3 [1B, 1C]
4Ch	ORL A,R4 [1B, 1C]
4Dh	ORL A,R5 [1B, 1C]
4Eh	ORL A,R6 [1B, 1C]
4Fh	ORL A,R7 [1B, 1C]
50h	JNC code addr (rel) [2B, 2C]
51h	ACALL code addr (addr11) [2B, 2C]
52h	ANL data addr (direct),A [2B, 1C]
53h	ANL data addr(direct),#data(immediate) [3B, 2C]
54h	ANL A, #data (immediate) [2B, 1C]
55h	ANL A,data addr (direct) [2B, 1C]
56h	ANL A,@R0 [1B, 1C]
57h	ANL A,@R1 [1B, 1C]
58h	ANL A,R0 [1B, 1C]
59h	ANL A,R1 [1B, 1C]
5Ah	ANL A,R2 [1B, 1C]
5Bh	ANL A,R3 [1B, 1C]
5Ch	ANL A,R4 [1B, 1C]
5Dh	ANL A,R5 [1B, 1C]
5Eh	ANL A,R6 [1B, 1C]
5Fh	ANL A,R7 [1B, 1C]
60h	JZ code addr (rel) [2B, 2C]
61h	AJMP code addr (addr11) [2B, 2C]
62h	XRL data addr (direct),A [2B, 1C]
63h	XRL data addr (direct),#data (immediate) [3B, 2C]
64h	XRL A, #data (immediate) [2B, 1C]
65h	XRL A,data addr (direct) [2B, 1C]
66h	XRL A,@R0 [1B, 1C]
67h	XRL A,@R1 [1B, 1C]
68h	XRL A,R0 [1B, 1C]
69h	XRL A,R1 [1B, 1C]
6Ah	XRL A,R2 [1B, 1C]
6Bh	XRL A,R3 [1B, 1C]
6Ch	XRL A,R4 [1B, 1C]
6Dh	XRL A,R5 [1B, 1C]
6Eh	XRL A,R6 [1B, 1C]
6Fh	XRL A,R7 [1B, 1C]
70h	JNZ code addr (rel) [2B, 2C]
71h	ACALL code addr (addr11) [2B, 2C]
72h	ORL C,bit addr [2B, 2C]
73h	JMP @A+DPTR [1B, 2C]
74h	MOV A,#data (immediate) [2B, 1C]
75h	MOV data addr(direct),#data (immediate) [3B, 2C]
76h	MOV @R0,#data (immediate) [2B, 1C]
77h	MOV @R1,#data (immediate) [2B, 1C]
78h	MOV R0,#data (immediate) [2B, 1C]
79h	MOV R1,#data (immediate) [2B, 1C]
7Ah	MOV R2,#data (immediate) [2B, 1C]
7Bh	MOV R3,#data (immediate) [2B, 1C]
7Ch	MOV R4,#data (immediate) [2B, 1C]
7Dh	MOV R5,#data (immediate) [2B, 1C]
7Eh	MOV R6,#data (immediate) [2B, 1C]
7Fh	MOV R7,#data (immediate) [2B, 1C]
80h	SJMP code addr (rel) [2B, 2C]
81h	AJMP code addr (addr11) [2B, 2C]
82h	ANL C,bit addr [2B, 2C]
83h	MOVC A,@A+PC [1B, 2C]
84h	DIV AB [2B, 4C]
85h	MOV data addr (direct),data addr (direct) [3B, 2C]
86h	MOV data addr (direct),@R0 [2B, 2C]
87h	MOV data addr (direct),@R1 [2B, 2C]
88h	MOV data addr (direct),R0 [2B, 2C]
89h	MOV data addr (direct),R1 [2B, 2C]
8Ah	MOV data addr (direct),R2 [2B, 2C]
8Bh	MOV data addr (direct),R3 [2B, 2C]
8Ch	MOV data addr (direct),R4 [2B, 2C]
8Dh	MOV data addr (direct),R5 [2B, 2C]
8Eh	MOV data addr (direct),R6 [2B, 2C]
8Fh	MOV data addr (direct),R7 [2B, 2C]
90h	MOV DPTR,#data16 (immediate) [3B, 2C]
91h	ACALL code addr (addr11) [2B, 2C]
92h	MOV bit addr,C [2B, 2C]
93h	MOVC A,@A+DPTR [1B, 2C]
94h	SUBB A,#data (immediate) [2B, 1C]
95h	SUBB A,data addr (direct) [2B, 1C]
96h	SUBB A,@R0 [1B, 1C]
97h	SUBB A,@R1 [1B, 1C]
98h	SUBB A,R0 [1B, 1C]
99h	SUBB A,R1 [1B, 1C]
9Ah	SUBB A,R2 [1B, 1C]
9Bh	SUBB A,R3 [1B, 1C]
9Ch	SUBB A,R4 [1B, 1C]
9Dh	SUBB A,R5 [1B, 1C]
9Eh	SUBB A,R6 [1B, 1C]
9Fh	SUBB A,R7 [1B, 1C]
A0h	ORL C,/bit addr [2B, 2C]
A1h	AJMP code addr (addr11) [2B, 2C]
A2h	MOV C,bit addr [2B, 1C]
A3h	INC DPTR [1B, 2C]
A4h	MUL AB [1B, 4C]
A5h	Reserved
A6h	MOV @R0,data addr (direct) [2B, 2C]
A7h	MOV @R1,data addr (direct) [2B, 2C]
A8h	MOV R0,data addr (direct) [2B, 2C]
A9h	MOV R1,data addr (direct) [2B, 2C]
AAh	MOV R2,data addr (direct) [2B, 2C]
ABh	MOV R3,data addr (direct) [2B, 2C]
ACh	MOV R4,data addr (direct) [2B, 2C]
ADh	MOV R5,data addr (direct) [2B, 2C]
AEh	MOV R6,data addr (direct) [2B, 2C]
AFh	MOV R7,data addr (direct) [2B, 2C]
B0h	ANL C,/bit addr [2B, 2C]
B1h	ACALL code addr (addr11) [2B, 2C]
B2h	CPL bit addr [2B, 1C]
B3h	CPL C [1B, 1C]
B4h	CJNE A,#data (immediate),code addr (rel) [3B, 2C]
B5h	CJNE A,data addr (direct),code addr (rel) [3B, 2C]
B6h	CJNE @R0,#data (immediate),code addr (rel) [3B, 2C]
B7h	CJNE @R1,#data (immediate),code addr (rel) [3B, 2C]
B8h	CJNE R0,#data (immediate),code addr (rel) [3B, 2C]
B9h	CJNE R1,#data (immediate),code addr (rel) [3B, 2C]
BAh	CJNE R2,#data (immediate),code addr (rel) [3B, 2C]
BBh	CJNE R3,#data (immediate),code addr (rel) [3B, 2C]
BCh	CJNE R4,#data (immediate),code addr (rel) [3B, 2C]
BDh	CJNE R5,#data (immediate),code addr (rel) [3B, 2C]
BEh	CJNE R6,#data (immediate),code addr (rel) [3B, 2C]
BFh	CJNE R7,#data (immediate),code addr (rel) [3B, 2C]
C0h	PUSH data addr (direct) [2B, 2C]
C1h	AJMP code addr (addr11) [2B, 2C]
C2h	CLR bit addr [2B, 1C]
C3h	CLR C [1B, 1C]
C4h	SWAP A [1B, 1C]
C5h	XCH A,data addr (direct) [2B, 1C]
C6h	XCH A,@R0 [1B, 1C]
C7h	XCH A,@R1 [1B, 1C]
C8h	XCH A,R0 [1B, 1C]
C9h	XCH A,R1 [1B, 1C]
CAh	XCH A,R2 [1B, 1C]
CBh	XCH A,R3 [1B, 1C]
CCh	XCH A,R4 [1B, 1C]
CDh	XCH A,R5 [1B, 1C]
CEh	XCH A,R6 [1B, 1C]
CFh	XCH A,R7 [1B, 1C]
D0h	POP data addr (direct) [2B, 2C]
D1h	ACALL code addr (addr11) [2B, 2C]
D2h	SETB bit addr [2B, 1C]
D3h	SETB C [1B, 1C]
D4h	DA A [1B, 1C]
D5h	DJNZ data addr (direct),code addr (rel) [3B, 2C]
D6h	XCHD A,@R0 [1B, 1C]
D7h	XCHD A,@R1 [1B, 1C]
D8h	DJNZ R0,code addr (rel) [2B, 2C]
D9h	DJNZ R1,code addr (rel) [2B, 2C]
DAh	DJNZ R2,code addr (rel) [2B, 2C]
DBh	DJNZ R3,code addr (rel) [2B, 2C]
DCh	DJNZ R4,code addr (rel) [2B, 2C]
DDh	DJNZ R5,code addr (rel) [2B, 2C]
DEh	DJNZ R6,code addr (rel) [2B, 2C]
DFh	DJNZ R7,code addr (rel) [2B, 2C]
E0h	MOVX A,@DPTR [1B, 2C]
E1h	AJMP code addr (addr11) [2B, 2C]
E2h	MOVX A,@R0 [1B, 2C]
E3h	MOVX A,@R1 [1B, 2C]
E4h	CLR A [1B, 1C]
E5h	MOV A,data addr (direct) [2B, 1C]
E6h	MOV A,@R0 [1B, 1C]
E7h	MOV A,@R1 [1B, 1C]
E8h	MOV A,R0 [1B, 1C]
E9h	MOV A,R1 [1B, 1C]
EAh	MOV A,R2 [1B, 1C]
EBh	MOV A,R3 [1B, 1C]
ECh	MOV A,R4 [1B, 1C]
Edh	MOV A,R5 [1B, 1C]
EEh	MOV A,R6 [1B, 1C]
EFh	MOV A,R7 [1B, 1C]
F0h	MOVX @DPTR,A [1B, 2C]
F1h	ACALL code addr (addr11) [2B, 2C]
F2h	MOVX @R0,A [1B, 2C]
F3h	MOVX @R1,A [1B, 2C]
F4h	CPL A [1B, 1C]
F5h	MOV data addr (direct),A [2B, 1C]
F6h	MOV @R0,A [1B, 1C]
F7h	MOV @R1,A [1B, 1C]
F8h	MOV R0,A [1B, 1C]
F9h	MOV R1,A [1B, 1C]
FAh	MOV R2,A [1B, 1C]
FBh	MOV R3,A [1B, 1C]
FCh	MOV R4,A [1B, 1C]
FDh	MOV R5,A [1B, 1C]
FEh	MOV R6,A [1B, 1C]
FFh	MOV R7,A [1B, 1C]

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Related topics:
8051 Instruction Set Overview   |   8051 Instruction Cycle   |   8051 Machine Cycle   |   8051 Arithmetic Operation Instructions   |   8051 Logical Operation Instructions   |   8051 Data Transfer Instructions   |   8051 Boolean Variable Manipulation Instructions   |   8051 Program Branching Instructions   |   8051 Instruction Opcode   |   8051 Instructions that Affect Flag Settings   |   8051 Instructions and Examples

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List of topics: 8051

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