Decrement
Instruction | DEC byte |
---|---|
Function | Decrement |
Description | DEC byte decrements the variable indicated by 1. An original value of 00H underflows to 0FFH. No flags are affected. Four operand addressing modes are allowed: accumulator, register, direct, or register-indirect. Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins. |
Example | Register 0 contains 7FH (01111111B) . Internal RAM locations 7EH and 7FH contain 00H and 40H, respectively. The following instruction sequence, DEC @R0 DEC R0 DEC @R0 leaves register 0 set to 7EH and internal RAM locations 7EH and 7FH set to 0FFH and 3FH. |
Variants | DEC A DEC Rn DEC direct address DEC @Ri |
Instruction | DEC A |
---|---|
Bytes | 1 |
Cycles | 1 |
Encoding | 0 0 0 1 0 1 0 0 |
Operation | A = A - 1 |
Flags Affected | C AC F0 RS1 RS0 OV P |
Example | DEC A |
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold |
Instruction | DEC Rn |
---|---|
Bytes | 1 |
Cycles | 1 |
Encoding | 0 0 0 1 1 n n n |
Operation | Rn = Rn - 1 |
Flags Affected | C AC F0 RS1 RS0 OV P |
Example | DEC R4 |
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold |
Instruction | DEC direct address |
---|---|
Bytes | 2 |
Cycles | 1 |
Encoding | 0 0 0 1 0 1 0 1 A7...A0 |
Operation | (direct) = (direct) - 1 |
Flags Affected | C AC F0 RS1 RS0 OV P |
Example | DEC 34h |
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold |
Instruction | DEC @Ri |
---|---|
Bytes | 1 |
Cycles | 1 |
Encoding | 0 0 0 1 0 1 1 i |
Operation | (Ri) = (Ri) - 1 |
Flags Affected | C AC F0 RS1 RS0 OV P |
Example | DEC @R0 |
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold |
Related topics:
8051 Arithmetic Operation Instructions | 8051 ADD Instruction | 8051 ADDC Instruction | 8051 SUBB Instruction | 8051 INC Instruction | 8051 MUL Instruction | 8051 DIV Instruction | 8051 DA Instruction
List of topics: 8051
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