Sunday, February 28, 2016

8051 Data Transfer Instructions

Data Transfer Operations

  • A, Acc: Accumulator
  • B: B special function register
  • C: Carry flag in PSW
  • Rn: Register R7-R0 of the currently selected Register Bank.
  • dir: 8-bit internal data location’s address. This could be an Internal Data RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)]. Direct Addressing Mode.
  • @Ri : 8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0. Indirect Addressing Mode.
  • #data: 8-bit constant included in instruction. Immediate Addressing Mode.
  • #data 16: 16-bit constant included in instruction. Immediate Addressing Mode.
  • addr 16: 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K byte Program Memory address space. Long Addressing Mode.
  • addr 11: 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following instruction. Absolute Addressing Mode.
  • rel: Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Relative Addressing Mode.
  • bit: Direct Addressed bit in Internal Data RAM or Special Function Register
  • 1B: 1 byte
    2B: 2 byte
    3B: 3 byte
    1C: 1 cycle
    2C: 2 cycles
    4C: 4 cycles
    P: oscillator Period
MnemonicDescription
MOVA,RnMove register to Accumulator
[1B,1C,12P]
MOVA,directMove direct byte to Accumulator
[2B,1C,12P]
MOVA,@RiMove indirect RAM to Accumulator
[1B,1C,12P]
MOVA,#dataMove immediate data to Accumulator
[2B,1C,12P]
MOVRn,AMove Accumulator to Register
[1B,1C,12P]
MOVRn,directMove direct byte to register
[2B,2C,24P]
MOVRn,#dataMove immediate data to Register
[2B,1C,12P]
MOVdirect,AMove Accumulator to direct byte
[2B,1C,12P]
MOVdirect,RnMove register to direct Byte
[2B,2C,24P]
MOVdirect,directMove direct byte to direct
[3B,2C,24P]
MOVdirect,@RiMove indirect RAM to direct byte
[2B,2C,24P]
MOVdirect,#dataMove immediate data to direct byte
[3B,2C,24P]
MOV@Ri,AMove Accumulator to indirect RAM
[1B,1C,12P]
MOV@Ri,directMove direct byte to indirect RAM
[2B,2C,24P]
MOV@Ri,#dataMove immediate data to indirect RAM
[2B,2C,24P]
MOVDPTR,#data16Load Data Pointer with a 16-bit constant
[3B,2C,24P]
MOVCA,@A+DPTRMove Code byte relative to DPTR to Acc
[1B,2C,24P]
MOVCA,@A+PCMove Code byte relative to PC to Acc
[1B,2C,24P]
MOVXA,@RiMove External RAM (8-bit addr) to Acc
[1B,2C,24P]
MOVXA,@DPTRMove Exernal RAM (16-bit addr) to Acc
[1B,2C,24P]
MOVX@Ri,AMove Acc to External RAM (8-bit addr)
[1B,2C,24P]
MOVX@DPTR,AMove Acc to External RAM (16-bit addr)
[1B,2C,24P]
PUSHdirectPush direct byte onto Stack
[2B,2C,24P]
POPdirectPop direct byte from Stack
[2B,2C,24P]
XCHA,RnExchange register with Accumulator
[1B,1C,12P]
XCHA,directExchange direct byte with Accumulator
[2B,1C,12P]
XCHA,@RiExchange indirect RAM with Accumulator
[1B,1C,12P]
XCHDA,@RiExchange low-order Digit indirect RAM with Acc
[1B,1C,12P]

Move
MOV instruction is concerned with moving data internally
MOV R2, #80h ; Move immediate data value 80h to register R2
MOV R4, A ; Copy data from accumulator to register R4
MOV DPTR, #0F22Ch ; Move immediate value F22Ch to the DPTR register
MOV R2, 80h ; Copy data from 80h (Port 0 SFR) to R2
MOV 52h, #52h ; Copy immediate data value 52h to RAM location 52h
MOV 52h, 53h ; Copy data from RAM location 53h to RAM 52h
MOV A, @R0 ; Copy contents of location addressed in R0 to A
MOVX instruction is used to access the external memory (X indicates eXternal memory access). All external moves must work through the A register (accumulator).
MOVX @DPTR, A ; Copy data from A to the address specified in DPTR
MOVX A, @DPTR ; Copy data from address specified in DPTR to A
MOVC instruction is used to read data from the external code memory (ROM).
MOV DPTR, # 2000h ; Copy the data value 2000h to the DPTR register
MOV A, #80h ; Copy the data value 80h to register A
MOVC A, @A+DPTR ; Copy the contents of the address 2080h (2000h + 80h) to register A

PUSH and POP
PUSH and POP instructions are used with the stack only
PUSH 4Ch ; Contents of RAM location 4Ch is saved to the stack. SP is incremented.
PUSH 00h ; The content of R0 (which is at 00h in RAM) is saved to the stack and SP is incremented.
POP 80h ; The data from current SP address is copied to 80h and SP is decremented.

Exchange
XCH (eXCHange) instruction is used to swap the data between source and destination, effectively changing the source data. XCH instructions must use register A. XCHD is a special case of the exchange instruction where just the lower nibbles are exchanged.
XCH A, R3 ; Exchange bytes between A and R3
XCH A, @R0 ; Exchange bytes between A and RAM location whose address is in R0
XCH A, A0h ; Exchange bytes between A and RAM location A0h (SFR port 2)



Related topics:
8051 Instruction Set Overview   |   8051 Instruction Cycle   |   8051 Machine Cycle   |   8051 Instruction Set Summary   |   8051 Arithmetic Operation Instructions   |   8051 Logical Operation Instructions   |   8051 Boolean Variable Manipulation Instructions   |   8051 Program Branching Instructions   |   8051 Instruction Opcode   |   8051 Instructions that Affect Flag Settings   |   8051 Instructions and Examples

List of topics: 8051

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